AMAT 0100-20100 VME I/O 板
1.產(chǎn) 品 資 料 介 紹：
中文資料：
AMAT 0100-20100字節(jié)排序：大字節(jié)/小字節(jié)由于主要微處理器制造商摩托羅拉和英特爾的傳統(tǒng)不同，字節(jié)排序問題存在。VMEbus板是圍繞摩托羅拉的680X0處理器和兼容性設計的，這些處理器和兼容性將多個字節(jié)值存儲在內(nèi)存中，最高有效字節(jié)位于最低字節(jié)地址。這種字節(jié)排序方案被稱為“Big Endian”排序。另一方面，英特爾的80X86微處理器在內(nèi)存中存儲多個字節(jié)值，其中最低有效字節(jié)位于最低字節(jié)地址，因此得名“Little Endian”排序
AMAT 0100-20100的PCI到VMEbus接口使用基于英特爾或等效的橋接芯片，該芯片使用Little Endian字節(jié)排序。字節(jié)排列以及處理器中的數(shù)據(jù)與存儲器中傳輸?shù)臄?shù)據(jù)之間的字節(jié)關系如圖1-2所示。
請注意，在Little Endian設備中，在多字節(jié)寫入（如所示的L字傳輸）后，內(nèi)存的最低有效字節(jié)存儲在最低字節(jié)地址中，而反射內(nèi)存的最高有效字節(jié)則存儲在此類傳輸后的最高字節(jié)地址中AMAT 0100-20100
英文資料：
Byte Ordering: Big Endian / Little Endian The byte-ordering issue exists due to the different traditions at the major microprocessor manufacturers, Motorola and Intel. VMEbus boards are designed around Motorola’s 680X0 processors and compatibles, which store multiple-byte values in memory with the most significant byte at the lowest byte address. This byte-ordering scheme became known as “Big Endian” ordering. On the other hand, Intel’s 80X86 microprocessors, store multiple-byte values in memory with the least significant byte in the lowest byte address, earning the name “Little Endian” ordering
The AMAT 0100-20100’s PCI-to-VMEbus interface uses an Intel based or equivalent bridge chip, which uses Little Endian byte ordering. Byte arrangement and the byte relationship between data in the processor and transferred data in memory are shown in Figure 1-2.AMAT 0100-20100
Note that in Little Endian devices, the Memory’s least significant byte is stored in the lowest byte address after a multiple-byte write (such as the Lword transfer illustrated), while the Reflective Memory’s most significant byte is stored in the highest byte address after such transfersAMAT 0100-20100
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